Semiconductor Research & Development

A platform for RF interposers is one of the fundamental advanced packaging technologies required to enable future applications with extreme bandwidth. These applications demand ultra-high-data-rate communication for the future Internet of Things including Artificial Intelligence, Augmented Reality, and Virtual Reality, involving Distributed Communication Networks, Joint Communication and Sensing, and Data Links for High-Speed Computing. The RF interposer platform developed at imec provides a unique solution to achieve bandwidths of 140 GHz and above by combining in one package multiple technologies such as III-V devices, RF antennas, and advanced digital CMOS. Implementation of this platform will enable a state-of-the art, manufacturable, and reliable transceiver module.

Technical Contact:
Jonathan Prange, Technical Program Director
[email protected]

This project entails system modeling of a multi-board assembly for high performance computing, Artificial Intelligence training and quantum systems, resulting in a 100x increase in energy efficiency at the system level compared to state-of-the-art CMOS systems.

Technical Contact:
Jonathan Prange, Technical Program Director
[email protected]

The work involves the demonstration of a transmission line with a data rate of 112 Gbps and an insertion loss of 0.1dB/mm, an array antenna with an improved gain, a higher clock rate circuit, and the development of manufacturing processes. Also, efforts include reducing fabrication errors, ensuring precise measurements, and conducting a detailed study that may incorporate machine learning methods. These technologies will support the realistic design of metaconductors, meta-interconnects, and other meta-components for advanced packaging and system integration.

Technical Contact:
Dr. Yong Kyu Yoon
[email protected]

Vulnerabilities in the electronics supply chain present significant risks that can compromise the integrity and security of the advanced semiconductor manufacturing processes. Various attack models, such as hardware Trojans or physical tampering, can be employed by malicious actors. Security threats can range from the introduction of counterfeit components to the exploitation of supply chain gaps. Assurance challenges arise due to the difficulty in verifying the authenticity and security of each component throughout the supply chain. To mitigate these risks, this effort will explore different attack models and develop countermeasures such as enhanced verification processes, supply chain audits, and robust authentication protocols.

Technical Contact:
Navid Asadi
[email protected]
Dr. Yong Kyu Yoon
[email protected]

The Digital Twin is a sophisticated digital architecture designed to enhance the efficiency of manufacturing operations, particularly in areas like capacity planning and predictive maintenance. This predictive technology is being broadened to include a wider array of processes related to semiconductor packaging and manufacturing to optimize performance across the board.

Technical Contact:
Dr. Sean Mondesire
[email protected]

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